• DocumentCode
    243960
  • Title

    Reducing Energy per Instruction via Dynamic Resource Allocation and Voltage and Frequency Adaptation in Asymmetric Multicores

  • Author

    Annamalai, A. ; Rodrigues, Rodrigo ; Koren, Israel ; Kundu, Sandipan

  • Author_Institution
    Adv. Micro Devices Inc., CA, USA
  • fYear
    2014
  • fDate
    9-11 July 2014
  • Firstpage
    436
  • Lastpage
    441
  • Abstract
    With the advent of multicore processors the emphasis incomputation is moving from sequential to parallel processing. Still, applications that require strong sequential performance do not achieve their highest performance/power when executing on current multicoresystems. As the computational needs vary significantly across different applications and with time, there is a need to dynamically allocate appropriate computational resources on demand to suit the applications´ current needs, in order to minimize the energy consumption. The Energy per Instruction (EPI) could be further decreased by dynamically adapting the voltage and frequency to better fit the changing characteristics of the workload. Not only can a core be forced to a low power mode when its activity level is low, but the power saved by doing so could be opportunistically re-budgeted to other cores to boost the overall system throughput. To this end, we propose a holistic solution to energy efficiency improvement by seamlessly combining heterogeneity, Dynamic ResourceAllocation (DRA) and Dynamic Voltage and Frequency Adaptation (DVFA) capabilities to adapt the core resources to the changing demands of applications. Our results show that the proposed scheme provides anEPI reduction of about 17.9% when compared to the baseline heterogeneous multicore, 14% when compared to the baseline heterogeneous multicore with DVFA only and about 16.5% when compared to the baseline heterogeneous multicore with DRA only.
  • Keywords
    energy conservation; low-power electronics; minimisation; multiprocessing systems; parallel processing; performance evaluation; power aware computing; resource allocation; DRA; DVFA; EPI reduction; asymmetric multicores; dynamic resource allocation; dynamic voltage and frequency adaptation; energy consumption minimization; energy efliciency improvement; energy per instruction reduction; multicore processors; parallel processing; power saving; sequential performance; Benchmark testing; Dynamic scheduling; Instruction sets; Monitoring; Multicore processing; Radio spectrum management; Resource management; Asymmetric Multicore Processor (AMP); Dynamic Resource Allocation (DRA); Dynamic voltage and frequency adaptation (DVFA); Hardware counters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
  • Conference_Location
    Tampa, FL
  • Print_ISBN
    978-1-4799-3763-9
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2014.110
  • Filename
    6903403