Title :
Achieving High-Performance Video Analytics with Lightweight Cores and a Sea of Hardware Accelerators
Author :
Irick, Kevin M. ; Chandramoorthy, Nandhini
Author_Institution :
SiliconScapes LLC, State College, PA, USA
Abstract :
High performance and energy efficient video analytics systems that can extract rich metadata from voluminous visual content, will enable a variety of high-value surveillance, driver assistance, video tagging, and first person analytics systems. These big-data applications are pervasive across retail, automotive, medical, agriculture and security domains. However, current trends in general purpose and multicore architectures will not keep pace with the growing computational demands of cutting edge visual perception algorithms. Hardware acceleration is crucial to surpassing what is realizable on modern multicore and GPGPU architectures. In this paper we detail a Sea-of-Accelerators, SoA, platform that combines a mix of macro-accelerators, microaccelerators, and lightweight processors to achieve high performance and energy efficiency in video analytics applications. In this paper, we describe a framework for video and image analytics and highlight its benefits with a case study of a customized visual saliency accelerator. We describe the architecture of a full custom macro-accelerator that is suitable when raw performance is of critical importance. As an alternative, we illustrate the composition of an accelerator from a constituent of loosely coupled microaccelerators and evaluate the performance achievable when performance and flexibility are competing objectives.
Keywords :
meta data; microprocessor chips; video signal processing; visual perception; GPGPU architecture; big-data applications; customized visual saliency accelerator; driver assistance; energy efficiency; first person analytics systems; full custom macro-accelerator; hardware acceleration; hardware accelerators; high-performance video analytics; high-value surveillance; image analytics; lightweight cores; lightweight processors; loosely coupled microaccelerators; macro-accelerators; modern multicore achictecture; multicore architectures; rich metadata; sea-of-accelerators; video tagging; visual perception algorithms; voluminous visual content; Convolution; Histograms; Interpolation; Kernel; Program processors; Streaming media; Visualization;
Conference_Titel :
VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3763-9
DOI :
10.1109/ISVLSI.2014.112