DocumentCode :
2440680
Title :
On the proportioning of chip area for multistage Darlington power transistors
Author :
Einthoven, W.G. ; Wheatley, C. F ., Jr.
Author_Institution :
RCA Solid State Division, Somerville, N.J., USA
fYear :
1975
fDate :
9-11 June 1975
Firstpage :
282
Lastpage :
291
Abstract :
A model has been proposed and solved in which all Darlington circuits may be represented to a first order approximation by five constants, one of which may be normalized. Experimental verification has been provided offering excellent agreement with theory. Several orders of magnitude improvement in current handling ability have been shown to exist for multistage Darlington circuits over conventional discrete transistors.
Keywords :
Electrical resistance measurement; Integrated circuit modeling; Magneto electrical resistivity imaging technique; Power transistors; Semiconductor device measurement; Transistors; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics Specialists Conference, 1975 IEEE
Conference_Location :
Culver City, California, USA
ISSN :
0275-9306
Type :
conf
DOI :
10.1109/PESC.1975.7085593
Filename :
7085593
Link To Document :
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