DocumentCode
2440785
Title
Assembly techniques related to die crack in high power dissipation MDIPs
Author
DiOrio, Mark ; Pinamaneni, SubbaRao
Author_Institution
Nat. Semicond. Corp., Santa Clara, CA, USA
fYear
1988
fDate
9-11 May 1988
Firstpage
45
Lastpage
48
Abstract
This study focuses on the assembly process variables that can have an impact on die cracking in high-power-dissipation molded dual in-line packages (MDIPs). The wafer saw and die attach processes are addressed. Wafer saw conditions are examined as they relate to kerf and the ability of edge-chipping to propagate fracture. Transducer measurements are made using commercially available die attach equipment to determine the force being exerted on the die during processing. Various equipment setups are reported on in an effort to eliminate topside and backside silicon damage which can result in die cracking.<>
Keywords
packaging; power integrated circuits; quality control; reliability; MDIPs; Si chips; assembly process variables; chip damage; die attach equipment; die attach processes; die crack; die cracking; edge-chipping; high power dissipation; kerf; molded dual in-line packages; wafer saw; Assembly; Copper alloys; Costs; Lead; Microassembly; Packaging; Plastics; Power dissipation; Silicon; Thermal stresses;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Components Conference, 1988., Proceedings of the 38th
Conference_Location
Los Angeles, CA, USA
Type
conf
DOI
10.1109/ECC.1988.12568
Filename
12568
Link To Document