Title :
Layout density analysis of FinFETs
Author :
Anil, K.C. ; Henson, K. ; Biesemans, S. ; Collaert, N.
Author_Institution :
Interuniv. Microelectron. Center, Leuven, Belgium
Abstract :
The layout of FinFETs patterned with direct lithography and spacer lithography are analysed from a circuit density perspective. Requirements on the height of the fin to obtain competitive layout density are derived. Spacer lithography will be required to obtain the layout density targets with reasonable values of fin height.
Keywords :
MOSFET; lithography; CMOS scaling; FinFET layout density analysis; circuit layout density; direct lithography patterned FinFET; fin height; spacer lithography patterning; CMOS technology; Circuit analysis; Etching; FinFETs; Lithography; MOSFETs; Pattern analysis; Resists; Space technology;
Conference_Titel :
European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7999-3
DOI :
10.1109/ESSDERC.2003.1256830
