• DocumentCode
    2441474
  • Title

    Effect of trench spacer etch on PMOS threshold voltage

  • Author

    Rho, Kyeonglan ; Burkhardt, Joseph ; Schweigert, Jeremy ; Fertig, Daniel

  • Author_Institution
    PolarFab, Bloomington, MN, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    57
  • Lastpage
    60
  • Abstract
    Sacrificial oxide growth depends on previous etch conditions of trench spacer. When etch process is not optimized, the variation in the thickness of the sacrificial oxide, through which threshold-adjust implant for PMOS transistors is performed, becomes large. By improving the etch process, the variation of sacrificial oxide thickness is reduced and the variation of PMOS threshold voltages is lessened. In this paper, we describe the improved etch condition and compare the results of 0.7 μm PMOS threshold voltages using different etch processes
  • Keywords
    MOSFET; sputter etching; 0.17 mum; PMOS threshold voltage; sacrificial oxide growth; threshold-adjust implant; trench spacer etch; Anisotropic magnetoresistance; Etching; Implants; MOS devices; MOSFETs; Planarization; Plasma applications; Plasma chemistry; Surface contamination; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Plasma Process-Induced Damage, 2000 5th International Symposium on
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    0-9651577-4-1
  • Type

    conf

  • DOI
    10.1109/PPID.2000.870595
  • Filename
    870595