DocumentCode :
2441797
Title :
Challenges in fielding `planned standards´
Author :
Hines, John
Author_Institution :
AFWAL/AADE, Wright-Patterson AFB, OH, USA
fYear :
1988
fDate :
21-23 Mar 1988
Firstpage :
27
Lastpage :
28
Abstract :
It is suggested that standards are primarily motivated by economics and that VHDL (VHSIC description language) is no different in this respect. An analysis of the rationale for the introduction of standards such as VHDL is explored in terms of economic impact on the community as well as methods and challenges involved in the introduction of the standard into the community
Keywords :
specification languages; standards; VHDL; VHSIC description language; community; economic impact; planned standards; Communication industry; Communication standards; Costs; Government; Industrial economics; Measurement standards; Microcomputers; Protection; Standards development; Standards organizations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Standards Conference, 1988. Computer Standards Evolution: Impact and Imperatives, Proceedings of the
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-0791-2
Type :
conf
DOI :
10.1109/CSTAND.1988.4757
Filename :
4757
Link To Document :
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