Necessary and sufficient conditions for reconfigurability in single-track switch WSI arrays

The fault-tolerance issue for arrays of large numbers of processors is considered. An array grid model based on single-track switches is adopted. Single track requires less hardware overhead and suffers less from possible faults on switches. More significantly, it is possible to establish a very critical necessary and sufficient condition for the reconfigurability of such an array. This is used as the theoretical footing for the reconfiguration algorithm, using global control for the (fabrication-time) yield enhancement. This approach can also effectively deal with failures of switches, wires, and connections to obtain a solution. The simulations conducted indicate that a significant yield enhancement can be achieved