DocumentCode
2442064
Title
Impact of gate current noise on drain current noise in 90 nm CMOS technology
Author
Valenza, M. ; Laigle, A. ; Martinez, F. ; Hoffmann, A. ; Rigaud, D.
Author_Institution
CEM2-ccO84, Univ. Montpellier II, France
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
287
Lastpage
290
Abstract
Gate and drain current noises on a 90 nm CMOS technology are investigated. Gate current noise shows 1/f and white noise. White noise is very close to shot noise, and we have a quadratic variation of 1/f noise with gate current. Coherence measurements show that the increase of drain noise at high gate biases can be attributed to tunneling effects.
Keywords
1/f noise; MOSFET; semiconductor device noise; shot noise; tunnelling; white noise; 1/f noise; 90 nm; CMOS technology; MOSFET; drain current noise; gate current noise; high gate bias; shot noise; tunneling effects; white noise; CMOS technology; Dielectrics; MOS devices; MOSFETs; Noise measurement; Performance evaluation; Testing; Tunneling; Voltage; White noise;
fLanguage
English
Publisher
ieee
Conference_Titel
European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7999-3
Type
conf
DOI
10.1109/ESSDERC.2003.1256870
Filename
1256870
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