Electrical analysis of mechanical stress induced by shallow trench isolation [MOSFETs]

This paper presents an electrical analysis of mechanical stress induced by shallow trench isolation (STI) on MOSFETs of advanced 0.13 /spl mu/m SOI technology. By applying external calibrated stress we measure piezoresistive effects and compare small and long transistor electrical responses. The main results are the mobility variations with stress, the strong effect of R/sub sd/ on transistors responses, the quasi uniform effect along the channel (weak local 2D effects). Then, using the same approach on short devices with different distances of gate edge to STI, we show how to evaluate the stress distribution induced by STI as well as its mean value under the gate of the devices. These results help to understand, minimize or optimize stress effects.