Comparison between bulk and SOI MOSFETs for sub-100nm mixed mode applications

Author

Suryagandh, Sushant S. ; Garg, Mayank ; Woo, Jason C S

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

423

Lastpage

426

Abstract

This paper presents a systematic and quantitative comparison between the analog characteristics of bulk and SOI technology. An analog performance metric of intrinsic gain, f/sub T/ and g/sub m//I/sub ds/ ratio is considered. The impact of device scaling on this performance metric has been analyzed. It is shown that, even for the frequencies in the range of GHz (where the AC kink effect is totally suppressed), the analog performance of SOI devices is inferior to that of the bulk devices due to capacitive drain-to-body coupling. Based on our study, we propose that gate-workfunction engineering is essential in FDSOI devices for improving analog performance at a threshold voltage compatible with the bulk technology.

Keywords

MOSFET; semiconductor device models; silicon-on-insulator; work function; 100 nm; AC kink effect; FDSOI devices; SOI MOSFET; analog performance metric; bulk MOSFET; capacitive drain-to-body coupling; device scaling; gate-workfunction engineering; mixed mode circuits; Digital circuits; Doping; Guidelines; Isolation technology; MOSFETs; Measurement; Performance gain; Radio frequency; Silicon; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7999-3

Type

conf

DOI

10.1109/ESSDERC.2003.1256904

Filename

1256904