C-V characterization of MOS capacitors on high resistivity silicon substrate

Author

Rong, B. ; Nanver, L.K. ; Burghartz, J.N. ; Jansman, A.B.M. ; Evans, A.G.R. ; Rejaei, B.S.

Author_Institution

Lab. of Electron. Components, Technol., & Mater.(ECTM), Delft Univ. of Technol., Netherlands

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

489

Lastpage

492

Abstract

This work reports on an investigation of capacitance-voltage (C-V) measurement of metal-oxide-semiconductor (MOS) capacitors on high resistivity silicon (HRS) used as substrate for radio-frequency (RF) integrated circuits. C-V MOS-capacitor characteristics differ considerably from those on low-resistivity silicon (LRS) due to potential drop in the substrate and large Debye length. Modeling of the substrate by a simple network of parallel resistors and capacitors is found to be insufficient at high frequencies in HRS. Medici simulations confirm the conclusions.

Keywords

MOS capacitors; electrical resistivity; elemental semiconductors; semiconductor device measurement; semiconductor device models; silicon; substrates; Debye length; MOS capacitor C-V characterization; RFIC; Si; Si-SiO/sub 2/; capacitance-voltage measurement; high resistivity silicon substrates; low-resistivity silicon; metal-oxide-semiconductor capacitors; substrate potential drop; Capacitance measurement; Capacitance-voltage characteristics; Circuit simulation; Conductivity; Integrated circuit measurements; MOS capacitors; Radio frequency; Radiofrequency integrated circuits; Resistors; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7999-3

Type

conf

DOI

10.1109/ESSDERC.2003.1256920

Filename

1256920