DocumentCode
2443122
Title
Nonvolatile nanocrystal floating gate memory with NON tunnel barrier
Author
Baik, Seung Jae ; Choi, Siyoung ; Chung, U-In ; Moon, Joo Tae
Author_Institution
Memory Div., Samsung Electron. Co. Ltd, Yongin-City, South Korea
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
509
Lastpage
511
Abstract
The nanocrystal floating gate flash memory has a potential advantage in high-density floating gate memory for its superior scalability over its conventional structure. However, the retention and small sensing window have remained as the main issues for practical applications. In this work, we propose a nitride/oxide/nitride (NON) tunnel barrier, which is more sensitive to the gate bias than the uniform oxide barrier, and present real nonvolatile memory with a 1 V window after 10 years at 85/spl deg/C with programming at 8 V, 10 /spl mu/s and erasing at -8 V, loops.
Keywords
flash memories; nanoelectronics; random-access storage; silicon compounds; -8 V; 10 mus; 10 year; 8 V; 85 degC; NON tunnel barrier; SiO/sub 2/-Si/sub 3/N/sub 4/; high-density memory scalability; nanocrystal floating gate flash memory; nitride/oxide/nitride tunnel barrier; nonvolatile memory; retention time; sensing window size; CMOS technology; Capacitance-voltage characteristics; Electronic mail; Flash memory cells; Frequency; Moon; Nanocrystals; Nonvolatile memory; Testing; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7999-3
Type
conf
DOI
10.1109/ESSDERC.2003.1256925
Filename
1256925
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