DocumentCode :
2443433
Title :
Application-aware spinlock control using a hardware scheduler in MPSoC platforms
Author :
Zhang, Diandian ; Lu, Li ; Castrillon, Jeronimo ; Kempf, Torsten ; Ascheid, Gerd ; Leupers, Rainer ; Vanthournout, Bart
Author_Institution :
Inst. for Commun. Technol. & Embedded Syst. (ICE), RWTH Aachen Univ., Aachen, Germany
fYear :
2012
fDate :
10-12 Oct. 2012
Firstpage :
1
Lastpage :
6
Abstract :
Spinlocks are a common technique in Multi-Processor Systems-on-Chip (MPSoCs) to protect shared resources and prevent data corruption. Without a priori application knowledge, the control of spinlocks has high randomness which can degrade the system performance significantly. This paper presents a centralized control mechanism of spinlocks by using a hardware scheduler called OSIP, that increases system performance by utilizing application-specific information. A complete spinlock control flow, starting from integrating high-level user-defined information down to a low-level realization of the control, is introduced. Two case studies demonstrate the high efficiency of this mechanism.
Keywords :
microprocessor chips; multiprocessing systems; system-on-chip; MPSoC platform; application aware spinlock control; application specific information; centralized control mechanism; data corruption prevention; hardware scheduler; low level realization; multiprocessor systems on chip; spinlock control flow; user defined information; Discrete cosine transforms; Hardware; Processor scheduling; Registers; Software; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System on Chip (SoC), 2012 International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4673-2895-1
Electronic_ISBN :
978-1-4673-2894-4
Type :
conf
DOI :
10.1109/ISSoC.2012.6376352
Filename :
6376352
Link To Document :
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