• DocumentCode
    2443527
  • Title

    Reconfigurable video decoder with transform acceleration

  • Author

    Nurmi, Lassi ; Salmela, Perttu ; Kellomäki, Pertti ; Jääskeläinen, Pekka ; Takala, Jarmo

  • Author_Institution
    Dept. of Comput. Syst., Tampere Univ. of Technol., Tampere, Finland
  • fYear
    2009
  • fDate
    7-9 Oct. 2009
  • Abstract
    Reconfigurable video coding (RVC) is an emerging concept allowing efficient usage of hardware resources. With the aid of reconfiguration the same computing resources can be used with different video coding standards and different decoding parameters. In this paper, an application specific processor (ASP) is proposed for the transform block of the RVC. The most intensive functions of several video coding standards are identified and their computations are accelerated with special function units (SFU). The same SFUs are shared among all the targeted video standards. As a result, the proposed ASP is capable of real-time decoding of MPEG-4, H.264, and VC-1 video streams with all the profiles and HD 720p resolution and frame rate. Moreover, the ASP is easily reconfigurable to support other formats with the same kernel functions.
  • Keywords
    application specific integrated circuits; microprocessor chips; reconfigurable architectures; video codecs; video coding; H.264; MPEG-4; VC-1; application specific processor; reconfigurable video decoder; special function units; transform acceleration; Acceleration; Application specific processors; Decoding; Hardware; High definition video; Kernel; MPEG 4 Standard; Streaming media; Video coding; Video sharing; ASP; reconfigurable; transform block; video decoder;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2009. SiPS 2009. IEEE Workshop on
  • Conference_Location
    Tampere
  • ISSN
    1520-6130
  • Print_ISBN
    978-1-4244-4335-2
  • Electronic_ISBN
    1520-6130
  • Type

    conf

  • DOI
    10.1109/SIPS.2009.5336229
  • Filename
    5336229