Title :
Fast pipeline schedule for an H.264 intra frame encoder with early termination
Author :
Jo, Young-Joon ; Jung, Jin-Su ; Lee, Hyuk-Jae
Author_Institution :
Dept. of Electr. Eng., Seoul Nat. Univ., Seoul, South Korea
Abstract :
This paper presents a fast H.264 intra frame encoder that processes an HD720p size video at 30 fps with the operating clock frequency of 40 MHz. The low clock frequency is achieved by a novel intra prediction schedule that employs pipelining of the 4 times 4 predictions and the early termination of 16 times 16 prediction. The pipelining is achieved by the optimal processing order for 4 times 4 predictions that reduces bubbles between consecutive 4 times 4 predictions. Execution cycles of 16 times 16 prediction are reduced by early termination which uses the cost of 4 times 4 prediction as the stop condition. With the proposed schedule, the execution time of 16 times 16 prediction is saved by 49% for intra prediction of HD720p size videos. For further speed-up, the two least probable modes among nine 4 times 4 prediction modes are excluded. As a result, the required execution time is reduced to 370 cycles which are about 61 cycles faster than the previous best implementation.
Keywords :
block codes; encoding; video coding; H.264 intra frame encoder; block reordering; early termination; fast pipeline schedule; Automatic voltage control; Clocks; Computer architecture; Costs; Frequency; Hardware; Interleaved codes; Pipeline processing; Termination of employment; Video coding; H.264; block reordering; early termination; intra prediction; pipeline schedule;
Conference_Titel :
Signal Processing Systems, 2009. SiPS 2009. IEEE Workshop on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-4335-2
Electronic_ISBN :
1520-6130
DOI :
10.1109/SIPS.2009.5336234