DocumentCode
2444034
Title
An ultra-low-power VAD hardware implementation for intelligent ubiquitous sensor networks
Author
Noguchi, Hiroki ; Takagi, Tomoya ; Yoshimoto, Masahiko ; Kawaguchi, Hiroshi
Author_Institution
Kobe Univ., Kobe, Japan
fYear
2009
fDate
7-9 Oct. 2009
Firstpage
214
Lastpage
219
Abstract
We propose a power management method using a digital voice activity detection (VAD) module for intelligent ubiquitous sensor systems. When this VAD module detects a speech signal, a main signal processing circuit is connected to a power source. When no speech signal is detected, most circuits except VAD are blocked off, thereby reducing stand-by power for the specialized sensor nodes used for speech signal processing. We implemented the VAD algorithm, using zero crossing of input signals to an FPGA, thereby achieving 2.10 mW operation. We synthesized this VAD module using CMOS 0.18-mum process, achieving 3.49 muW power consumption for operation at 1.8 V and 100 kHz.
Keywords
CMOS integrated circuits; field programmable gate arrays; intelligent networks; speech processing; ubiquitous computing; CMOS process; FPGA; VAD module; digital voice activity detection; hardware implementation; intelligent ubiquitous sensor networks; intelligent ubiquitous sensor systems; power 2.10 mW; power 3.49 muW; power consumption; power management method; signal processing circuit; speech signal; stand-by power; ultra-low-power VAD; voltage 1.8 V; Circuits; Energy management; Hardware; Intelligent networks; Intelligent sensors; Power system management; Signal detection; Signal processing; Signal processing algorithms; Speech processing; VAD; low power; sensor node; ubiquitous; zero crossing;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2009. SiPS 2009. IEEE Workshop on
Conference_Location
Tampere
ISSN
1520-6130
Print_ISBN
978-1-4244-4335-2
Electronic_ISBN
1520-6130
Type
conf
DOI
10.1109/SIPS.2009.5336254
Filename
5336254
Link To Document