DocumentCode
2444058
Title
Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency Scaling
Author
Park, Young Jin ; Zeng, Min ; Lee, Byeong-Seok ; Lee, Jeong-A ; Kang, Seung Gu ; Kim, Cheol Hong
Author_Institution
Sch. of Electron. & Comput. Eng., Chonnam Nat. Univ., Gwangju, South Korea
fYear
2010
fDate
18-20 Aug. 2010
Firstpage
69
Lastpage
74
Abstract
As the process technology scales down, interconnects become the performance bottleneck when designing multi-core processors. 3D IC can be a good solution for reducing the interconnection delay in the multi-core processors by stacking multiple layers connected through TSVs. However, 3D technology magnifies the thermal challenges in 3D multi-core processors. For this reason, 3D multi-core architecture cannot be practical without proper solutions to the thermal problems such as efficient DFS. This paper investigates how the continuous engaged DFS technique handles the thermal problem on 3D multi-core processors in unit level. We also identify the optimal matrix to achieve best performance varying application features, cooling characteristics, and frequency levels when the thermal problem is considered. Experimental results conclude two rules for managing and balancing the temperature of the die, especially the IntReg unit: 1) To optimize the thermal profile of both dies, the die with higher cooling efficiency should be clocked at a higher frequency; and 2) To lower the temperature of IntReg unit, workload with higher thermal impact should be assigned to cores with higher cooling efficiency.
Keywords
computer architecture; microprocessor chips; multiprocessing systems; multiprocessor interconnection networks; power aware computing; thermal analysis; three-dimensional integrated circuits; 3D IC; 3D multicore architecture; 3D multicore processors; IntReg; TSV; cooling characteristics; dynamic frequency scaling; interconnection delay; process technology; thermal analysis; Bonding; Cooling; Multicore processing; Thermal management; Three dimensional displays; Through-silicon vias; 3D multi-core processor; dynamic frequency scaling; dynamic thermal management; pocessor architecture; thermal management;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Information Science (ICIS), 2010 IEEE/ACIS 9th International Conference on
Conference_Location
Yamagata
Print_ISBN
978-1-4244-8198-9
Type
conf
DOI
10.1109/ICIS.2010.54
Filename
5593122
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