DocumentCode
2444073
Title
Bidirectional interleavers for LDPC decoders using transmission gates
Author
Cushon, Kevin ; Gross, Warren J. ; Mannor, Shie
Author_Institution
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
fYear
2009
fDate
7-9 Oct. 2009
Firstpage
232
Lastpage
237
Abstract
Low-density parity check (LDPC) codes are used for forward error correction in several state-of-the-art and upcoming communications standards. This paper presents a new interleaver architecture for LDPC decoders, especially suitable for multi-mode codes such as IEEE 802.16e (WiMAX) and IEEE 802.11n (Wi-Fi), that utilizes a bidirectional datapath and shuffle network composed of transmission gates. An implementation of this architecture for IEEE 802.11n achieves 28% area reduction and similar throughput compared to a unidirectional reference design.
Keywords
codecs; parity check codes; IEEE 802.11n; LDPC decoders; bidirectional datapath; bidirectional interleavers; communications standards; low-density parity check codes; shuffle network; transmission gates; Decoding; Parity check codes; Parallel architectures; decoding; error correction coding; very-large-scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2009. SiPS 2009. IEEE Workshop on
Conference_Location
Tampere
ISSN
1520-6130
Print_ISBN
978-1-4244-4335-2
Electronic_ISBN
1520-6130
Type
conf
DOI
10.1109/SIPS.2009.5336257
Filename
5336257
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