DocumentCode :
2444495
Title :
Embedded transition inversion coding for low power serial link
Author :
Huang, Wen-Chih ; Lin, Chih-Hsing ; Chiu, Ching-Te
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2011
fDate :
4-7 Oct. 2011
Firstpage :
102
Lastpage :
105
Abstract :
Serial link interconnection has generated a lot of attention in on-chip bus design due to its advantages over multibit parallel interconnection in terms of crosstalk, skew, and area cost. However, serializing a multi-bit parallel bus tends to increase the bit transition and power dissipation. This paper proposes an embedded transition inversion (ETI) coding scheme that uses the phase difference between the clock and data in the transmitted serial data to address the problem of the extra indication bit. This ETI coding scheme reduces the transition by up to 31% compared with the encoding followed by serial (ES) scheme. The analysis and simulation results, in this study indicate that the proposed coding scheme produces a low bit transition for different kinds of data pattern.
Keywords :
clocks; encoding; integrated circuit interconnections; low-power electronics; system buses; system-on-chip; ETI coding scheme; crosstalk; data pattern; embedded transition inversion coding scheme; low power serial link; multibit parallel bus; multibit parallel interconnection; on-chip bus design; phase difference; power dissipation; serial link interconnection; system-on-chip devices; Clocks; Delay; Detectors; Encoding; Mobile communication; Simulation; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems (SiPS), 2011 IEEE Workshop on
Conference_Location :
Beirut
ISSN :
2162-3562
Print_ISBN :
978-1-4577-1920-2
Type :
conf
DOI :
10.1109/SiPS.2011.6088957
Filename :
6088957
Link To Document :
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