Title : 
An energy-efficient multiple-input multiple-output (MIMO) detector architecture
         
        
            Author : 
Kim, Eric P. ; Shanbhag, Naresh R.
         
        
            Author_Institution : 
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana Champaign Coordinate Sci. Lab., Urbana, IL, USA
         
        
        
        
        
        
            Abstract : 
In this paper, a novel low complexity energy efficient recon-figurable reduced dimension maximum likelihood (RRDML) multiple-input multiple-output (MIMO) detector is proposed. RRDML is based on RDML [1], in which maximum likelihood (ML) is applied to detect a sub-dimension of the received vector and linear detection is used for the remaining dimension. The channel condition number is employed to configure RRDML. For a 4×4 MIMO system with 16-QAM modulation over a Rayleigh fading channel, Verilog simulation in a commercial 45nm, 1.2V CMOS process show that RRDML achieves up to 62.3% power savings with a BER loss at most 3.7% compared to ML based receivers.
         
        
            Keywords : 
CMOS integrated circuits; MIMO communication; error statistics; maximum likelihood estimation; quadrature amplitude modulation; 16-QAM modulation; BER loss; CMOS process; MIMO detector architecture; RRDML; energy-efficient multiple-input multiple-output; linear detection; multiple-input multiple-output detector; reconfigurable reduced dimension maximum likelihood; size 45 nm; voltage 1.2 V; Bit error rate; Complexity theory; Computer architecture; Detectors; MIMO; Maximum likelihood decoding; Signal to noise ratio; MIMO; Reconfigurable architectures; low power;
         
        
        
        
            Conference_Titel : 
Signal Processing Systems (SiPS), 2011 IEEE Workshop on
         
        
            Conference_Location : 
Beirut
         
        
        
            Print_ISBN : 
978-1-4577-1920-2
         
        
        
            DOI : 
10.1109/SiPS.2011.6088981