A fully-integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers

Author

Gerosa, Andrea ; Maniero, Andrea ; Neviani, Andrea

Author_Institution

Dept. of Inf. Eng., Padova Univ., Italy

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

157

Lastpage

160

Abstract

This work presents an input stage for a cardiac pacemaker fully integrated in a 0.35/spl mu/m CMOS technology. The system can acquire and digitize to 8 bits both atrial and ventricular electrical activity. Log-domain circuits are exploited to amplify and filter the input signal, while /spl Sigma//spl Delta/ modulation is exploited to convert it. The design is power optimized, indeed the power consumption is limited to 4.8/spl mu/W with a power supply down to 1.8V. The total area is 2.2mm/sup 2/ and experimental data prove correct filtering and a total DR of at least 47dB.

Keywords

CMOS integrated circuits; pacemakers; power consumption; sigma-delta modulation; signal detection; /spl Sigma//spl Delta/ modulation; 0.35 microns; 1.8 V; 4.8E-6 W; CMOS technology; atrial electrical activity; cardiac pacemaker; cardiac signals; fully-integrated A-D interface; implantable pacemakers; input stage; log-domain circuits; power optimized design; two-channel A-D interface; ventricular electrical activity; Batteries; CMOS logic circuits; CMOS technology; Design optimization; Energy consumption; Filtering; Pacemakers; Preamplifiers; Signal processing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7995-0

Type

conf

DOI

10.1109/ESSCIRC.2003.1257096

Filename

1257096