An 8-channel, 12-bit, 20 MHz fully differential tester IC for analog and mixed-signal circuits

Author

Hafed, Mohamed M. ; Roberts, Gordon W.

Author_Institution

DFT MicroSystems Inc., Montreal, Que., Canada

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

193

Lastpage

196

Abstract

An 8-channel mixed-signal tester integrated circuit that is suitable for very low footprint test applications is described. It is capable of simultaneously stimulating eight analog or mixed-mode devices under test and coherently digitizing eight device responses at an amplitude resolution of 12-b and a bandwidth of 20-MHz. The circuit is fabricated in a 2.5 V, 0.25 /spl mu/m CMOS process, and achieves a SFDR of over 70 dB at 20 MHz with a maximum DNL of 0.15 LSB. It owes its compactness to a versatile, mostly digital architecture that is easily synthesizable. Software-based performance evaluation and calibration is also described.

Keywords

CMOS integrated circuits; digital instrumentation; integrated circuit testing; mixed analogue-digital integrated circuits; 0.25 microns; 12 bit; 2.5 V; 20 MHz; 8-channel mixed-signal tester integrated circuit; CMOS process; analog circuit; analog devices under test; digital architecture; mixed-mode devices under test; mixed-signal circuits; simultaneous stimulation; software-based calibration; software-based performance evaluation; synthesizable architecture; very low footprint test applications; Analog integrated circuits; Circuit testing; Electronic equipment testing; Integrated circuit synthesis; Integrated circuit testing; Laboratories; Performance evaluation; Signal design; System testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7995-0

Type

conf

DOI

10.1109/ESSCIRC.2003.1257105

Filename

1257105