A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13/spl mu/m CMOS

Author

Giandomenico, Antonio Di ; Paton, Susana ; Wiesbauer, Andreas ; Hernández, Luis ; Pötscher, Thomas ; Dörrer, Lukas

Author_Institution

Infineon Technol. Design Centers Austria, Villach, Austria

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

233

Lastpage

236

Abstract

A wide bandwidth continuous time sigma-delta ADC implemented in a 0.13 /spl mu/m CMOS technology is introduced. Active blocks are composed of regular threshold voltage devices only. The circuit is targeted for wide-bandwidth applications such as video or wireless base stations. The fourth-order architecture uses an opamp-RC based loop filter and a 4 bit internal quantizer. Operated at 300 MHz clock frequency, the converter achieves a dynamic range of 11 bits over a bandwidth of 15 MHz. The power dissipation is 70mW operated from a 1.5V supply.

Keywords

CMOS integrated circuits; RC circuits; filters; operational amplifiers; quantisation (signal); sigma-delta modulation; 0.13 microns; 1.5 V; 15 MHz; 300 MHz; 70 mW; CMOS technology; active blocks; continuous time sigma-delta ADC; fourth-order architecture; internal quantizer; opamp-RC based loop filter; regular threshold voltage devices; video application; wide bandwidth sigma-delta ADC; wide-bandwidth applications; wireless base stations; Bandwidth; Base stations; CMOS technology; Circuits; Clocks; Delta-sigma modulation; Dynamic range; Filters; Frequency conversion; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7995-0

Type

conf

DOI

10.1109/ESSCIRC.2003.1257115

Filename

1257115