DocumentCode
2447111
Title
A CMOS 10Gb/s SONET transceiver
Author
Muthali, Harish S. ; Thomas, Thomas P. ; Young, Ian A.
Author_Institution
Portland Technol. Dev., Intel Corp., Hillsboro, OR, USA
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
281
Lastpage
284
Abstract
A 10 Gb/s synchronous optical network (SONET) transceiver is designed with 90nm digital CMOS technology. It consists of a serializing transmitter (TX) and a de-serializing receiver (RX) on a single chip. The 10GHz differential LC VCO´s in TX and RX, fully differential circuits, multiple power domains are implemented to exceed SONET jitter specifications.
Keywords
CMOS digital integrated circuits; SONET; differentiating circuits; jitter; transceivers; 10 GHz; 10 Gbit/s; 90 nm; SONET jitter specifications; SONET transceiver; de-serializing receiver; differential LC VCO; digital CMOS technology; fully differential circuits; multiple power domains; serializing transmitter; single chip; synchronous optical network; CMOS process; CMOS technology; Circuits; Clocks; Phase locked loops; Resistors; SONET; Transceivers; Varactors; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7995-0
Type
conf
DOI
10.1109/ESSCIRC.2003.1257127
Filename
1257127
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