DocumentCode :
2447942
Title :
Continuously tunable, very long time constant CMOS integrator for a neural recording implant
Author :
Rieger, Robert ; Demosthenous, Andreas ; Taylor, John
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll., London, UK
fYear :
2003
fDate :
16-18 Sept. 2003
Firstpage :
441
Lastpage :
444
Abstract :
This paper describes the implementation of a low-power, very long time constant integrator for use in an adaptive neural recording system for implantable neuroprostheses of very low frequency continuous-time filters. The integrator is based on the OTA-C approach and a very small transconductance (g/sub m/) of 125 pA/V was achieved by cascading a short chain of g/sub m/-1/g/sub m/ stages. The time constant of the integrator is tunable between 0.8 s to 2.5 s, and any offset voltages at the output terminal may be trimmed. The circuit was fabricated in a 0.8 /spl mu/m CMOS process, dissipates 230 nW from /spl plusmn/1.5 V power supplies (excluding the bias circuitry and output buffer) and has a core area of 0.1 mm/sup 2/. The integrator is superior to competing designs in terms of all relevant metrics.
Keywords :
CMOS analogue integrated circuits; continuous time filters; instrumentation amplifiers; low-power electronics; neural chips; tuning; CMOS process; bias circuitry; continuously tunable; implantable neuroprostheses; long time constant CMOS integrator; low frequency continuous-time filters; neural recording implant; offset voltages; output buffer; transconductance; Active filters; Diodes; Educational institutions; Implants; MOSFETs; Power dissipation; Thermal resistance; Transconductance; Tunable circuits and devices; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
Type :
conf
DOI :
10.1109/ESSCIRC.2003.1257167
Filename :
1257167
Link To Document :
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