Title :
Monolithic time-to-digital converter with 20ps resolution
Author :
Tisa, S. ; Lotito, A. ; Giudice, A. ; Zappa, F.
Author_Institution :
Dipt. di Elettronica e Informazione, Politecnico di Milano, Italy
Abstract :
We present a fully-integrated time-to-digital converter, in a standard 0.8/spl mu/m-CMOS technology, based on a cyclic pulse-shrinking design, that provides the lowest channel width of 20ps ever reported in literature for a single-shot measurements performed by monolithic circuits, with differential linearity errors lower than 10ps (less than 0.5LSB), conversion time shorter than 20/spl mu/s, and 18ns full-scale-range.
Keywords :
CMOS integrated circuits; Monte Carlo methods; analogue-digital conversion; microcontrollers; monolithic integrated circuits; pulse circuits; CMOS technology; cyclic pulse-shrinking design; differential linearity errors; monolithic circuits; resolution; time-to-digital converter; Analog-digital conversion; Circuits; Delay lines; Linearity; MOSFETs; Optical pulses; Pulse inverters; Pulse measurements; Space vector pulse width modulation; Time measurement;
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
DOI :
10.1109/ESSCIRC.2003.1257173
