Evaluation of the quality of N-detect scan ATPG patterns on a processor

Author

Amyeen, M. Enamul ; Venkataraman, Srikanth ; Ojha, Ajay ; Lee, Sangbong

Author_Institution

Intel Corp., Hillsboro, OR, USA

fYear

2004

fDate

26-28 Oct. 2004

Firstpage

669

Lastpage

678

Abstract

This paper evaluates N-detect scan ATPG patterns for their impact to test quality through simulation and fallout from production on a Pentium 4 processor using 90 nm manufacturing technology. An incremental ATPG flow is used to generate N-detect test patterns. The generated patterns were applied in production with flows to determine overlap in fallout to different tests. The generated N-detect test patterns are then evaluated based on different metrics. The metrics include signal states, bridge fault coverage, stuck-at fault coverage and fault detection profile. The correlation between the different metrics is studied. Data from production fallout shows the effectiveness of N-detect tests. Further, the correlation between fallout data and the different metrics is analyzed.

Keywords

automatic test pattern generation; fault diagnosis; microprocessor chips; 90 nm; ATPG flow; N-detect scan ATPG patterns; Pentium 4 processor; automatic test pattern generation; bridge fault coverage; fault detection profile; manufacturing technology; stuck-at fault coverage; test quality evaluation; Automatic test pattern generation; Bridges; Data mining; Fault detection; Manufacturing processes; Production; Pulp manufacturing; Test pattern generators; Testing; Virtual manufacturing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2004. Proceedings. ITC 2004. International

Print_ISBN

0-7803-8580-2

Type

conf

DOI

10.1109/TEST.2004.1387328

Filename

1387328