DocumentCode :
2448719
Title :
A 1V fully integrated CMOS transformer based mixer with 5.5dB gain, 14.5dB SSB noise figure and 0dBm input IP3
Author :
Tiebout, Marc ; Liebermann, Thomas
Author_Institution :
Corporate Res., Infineon Technol., Munich, Germany
fYear :
2003
fDate :
16-18 Sept. 2003
Firstpage :
577
Lastpage :
580
Abstract :
A fully integrated low voltage mixer topology is presented. The problem of stacking input-, cascade- and switching-transistors within 1 V supply voltage is solved by inserting a transformer, optimized for high coupling and high-self resonance frequency. A fully integrated test chip aiming at UMTS applications around 2 GHz to demonstrate the feasibility was manufactured in INFINEON low-cost 0.13 /spl mu/m 6 metal standard CMOS process. The single-ended mixer, including the on chip resistive 50 /spl Omega/ termination, features a gain of 5.5 dB, a SSB noise figure of 14.5 dB, an input 1 dB compression point of -10 dBm consuming 40 mW at a power supply voltage of 1 V. The mixer 3 dB-bandwidth ranges from 1.3 GHz up to 4.1 GHz.
Keywords :
CMOS digital integrated circuits; integrated circuit noise; low-power electronics; mixers (circuits); transformers; 0.13 micron; 1 V; 1.3 GHz; 2 GHz; 4.1 GHz; 40 mW; CMOS process; IP3; SSB noise figure; UMTS applications; chip resistive; high coupling; high self resonance frequency; integrated CMOS transformer; low voltage mixer topology; single ended mixer; stacking input; switching transistors; 3G mobile communication; Amplitude modulation; Low voltage; Manufacturing processes; Noise figure; Resonance; Resonant frequency; Stacking; Testing; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
Type :
conf
DOI :
10.1109/ESSCIRC.2003.1257201
Filename :
1257201
Link To Document :
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