• DocumentCode
    2448957
  • Title

    CMOS transistor mismatch model valid from weak to strong inversion

  • Author

    Serrano-Gotarredona, Teresa ; Linares-Barranco, Bernabé

  • Author_Institution
    Inst. de Microelectron. de Sevilla, Spain
  • fYear
    2003
  • fDate
    16-18 Sept. 2003
  • Firstpage
    627
  • Lastpage
    630
  • Abstract
    A five parameter mismatch model continuous from weak to strong inversion is presented. The model is an extension of a previously reported one valid in the strong inversion region [1]. A mismatch characterization of NMOS and PMOS transistors for 30 different geometries has been done with this continuous model. The model is able to predict current mismatch with a mean relative error of 13.5% in the weak inversion region and 5% in strong inversion. This is verified for 12 different curves, sweeping V/sub G/, V/sub DS/,V/sub S/.
  • Keywords
    CMOS analogue integrated circuits; MOSFET; integrated circuit design; transistors; CMOS transistor mismatch model; NMOS transistors; PMOS transistors; mismatch characterization; strong inversion; weak inversion; Artificial intelligence; CMOS technology; Data mining; Equations; Geometry; Intrusion detection; MOSFETs; Semiconductor device modeling; Thermal factors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
  • Conference_Location
    Estoril, Portugal
  • Print_ISBN
    0-7803-7995-0
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2003.1257213
  • Filename
    1257213