• DocumentCode
    2448984
  • Title

    Reducing measurement uncertainty in a DSP-based mixed-signal test environment without increasing test time

  • Author

    Taillefer, C. ; Roberts, G.W.

  • Author_Institution
    Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada
  • fYear
    2004
  • fDate
    26-28 Oct. 2004
  • Firstpage
    953
  • Lastpage
    962
  • Abstract
    Noise, especially clock jitter effects, in a DSP-based mixed-signal test system severely limits its measurement accuracy. This is especially acute in high-frequency sampling systems. This work illustrates an efficient method to improve measurement accuracy and precision by reducing the uncertainty of a DSP-based measurement without an increase in test time. A new digitizer architecture is introduced. The digitizer was fabricated in a 0.18 μm CMOS process. Experimental results were obtained validating the proposed technique.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; digital signal processing chips; measurement uncertainty; mixed analogue-digital integrated circuits; test equipment; timing jitter; CMOS process; DSP; clock jitter; digitizer architecture; high frequency sampling systems; measurement accuracy; measurement uncertainty; mixed signal test environment; mixed signal test system; test time; Additive noise; Clocks; Distortion measurement; Jitter; Measurement uncertainty; Noise measurement; Sampling methods; System testing; Test equipment; Working environment noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2004. Proceedings. ITC 2004. International
  • Print_ISBN
    0-7803-8580-2
  • Type

    conf

  • DOI
    10.1109/TEST.2004.1387360
  • Filename
    1387360