• DocumentCode
    2449235
  • Title

    A fast GPU algorithm for graph connectivity

  • Author

    Soman, Jyothish ; Kishore, Kothapalli ; Narayanan, P.J.

  • Author_Institution
    IIIT-Hyderabad, Hyderabad, India
  • fYear
    2010
  • fDate
    19-23 April 2010
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    Graphics processing units provide a large computational power at a very low price which position them as an ubiquitous accelerator. General purpose programming on the graphics processing units (GPGPU) is best suited for regular data parallel algorithms. They are not directly amenable for algorithms which have irregular data access patterns such as list ranking, and finding the connected components of a graph, and the like. In this work, we present a GPU-optimized implementation for finding the connected components of a given graph. Our implementation tries to minimize the impact of irregularity, both at the data level and functional level. Our implementation achieves a speed up of 9 to 12 times over the best sequential CPU implementation. For instance, our implementation finds connected components of a graph of 10 million nodes and 60 million edges in about 500 milliseconds on a GPU, given a random edge list. We also draw interesting observations on why PRAM algorithms, such as the Shiloach-Vishkin algorithm may not be a good fit for the GPU and how they should be modified.
  • Keywords
    coprocessors; parallel processing; GPU-optimized implementation; Shiloach-Vishkin algorithm; craphics processing units; fast GPU algorithm; general purpose programming; graph connectivity; large computational power; regular data parallel algorithms; ubiquitous accelerator; Arithmetic; Central Processing Unit; Graphics; Inference algorithms; Parallel algorithms; Parallel processing; Parallel programming; Partitioning algorithms; Pervasive computing; Phase change random access memory; Connected Components; GPGPU; GPU; Irregular algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    978-1-4244-6533-0
  • Type

    conf

  • DOI
    10.1109/IPDPSW.2010.5470817
  • Filename
    5470817