Title :
A complementary Colpitts oscillator based on 0.35 /spl mu/m CMOS technology
Author :
Cha, Choong-Yul ; Lee, Sang-Gug
Author_Institution :
Inf. & Commun. Univ., Daejeon, South Korea
Abstract :
A new complementary Colpitts CMOS oscillator topology is proposed and analyzed based on one port model. Analysis indicates that the proposed complementary Colpitts oscillator topology has advantage over other topologies for low phase noise and high frequency operation while the design guidelines for optimizing the phase noise of the proposed topology. The performance advantage of proposed oscillator topology originates from the simplicity, composed of effectively only two components (complementary transistor and one inductor), and the higher negative conductance of oscillator core. The proposed VCOs are fabricated using the 0.35/spl mu/m CMOS technology for 2, 5, 6 and 10GHz band. Measurement shows excellent performance considering the technology and power dissipation in 5 and 6 GHz band VCOs.
Keywords :
CMOS integrated circuits; circuit optimisation; integrated circuit design; integrated circuit noise; voltage-controlled oscillators; 0.35 micron; 10 GHz; 2 GHz; 5 GHz; 6 GHz; CMOS technology; Colpitts oscillator; VCO; complementary transistor; inductor; oscillator core; oscillator topology; phase noise optimization; power dissipation; voltage controlled oscillator; CMOS technology; Design optimization; Frequency; Guidelines; Inductors; Oscillators; Phase noise; Power measurement; Semiconductor device modeling; Topology;
Conference_Titel :
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location :
Estoril, Portugal
Print_ISBN :
0-7803-7995-0
DOI :
10.1109/ESSCIRC.2003.1257229
