DC and AC performance analysis of 25 nm symmetric/asymmetric double-gate, back-gate and bulk CMOS

Author

Ieong, Meikei ; Wong, H.-S Philip ; Taur, Yuan ; Oldiges, Phil ; Frank, David

Author_Institution

IBM SRDC, Hopewell Junction, NY, USA

fYear

2000

fDate

2000

Firstpage

147

Lastpage

150

Abstract

In this paper, the performance of 25 nm double-gate, back-gate and super-halo CMOS devices has been analyzed, including the self-consistent 2D quantization effect. The drive current is enhanced by the gate-to-body coupling effect for double-gate with ultra-thin body. The channel quantization effect can substantially degrade the drive current for asymmetric double-gate, back-gate, and bulk CMOS ICs. It is demonstrated that the exceptional SCE immunity in SDG offers substantial performance leverage over conventional MOSFET structures

Keywords

CMOS integrated circuits; MOSFET; integrated circuit modelling; quantisation (quantum theory); quantum interference phenomena; 25 nm; AC performance analysis; DC performance analysis; MOSFET structures; SCE immunity; asymmetric double-gate CMOS; asymmetric double-gate CMOS ICs; back-gate CMOS; bulk CMOS; channel quantization effect; double-gate CMOS; drive current; gate-to-body coupling effect; self-consistent 2D quantization effect; super-halo CMOS devices; symmetric double-gate CMOS; ultra-thin body; Degradation; MOSFET circuits; Performance analysis; Poisson equations; Potential energy; Quantization; Semiconductor device modeling; Semiconductor films; Silicon; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 2000. SISPAD 2000. 2000 International Conference on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-6279-9

Type

conf

DOI

10.1109/SISPAD.2000.871229

Filename

871229