Title :
Novel nonvolatile memory hierarchies to realize "normally-off mobile processors"
Author :
Fujita, S. ; Nomura, Keigo ; Noguchi, Hiroki ; Takeda, Shigeki ; Abe, Kiyohiko
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Kawasaki, Japan
Abstract :
This paper presents novel processor architecture for HP-processor with nonvolatile/volatile hybrid cache memory. By simulations of high-performance (HP)-processor using MTJs, it has been clarified that total power of the HP-processor using perpendicular-(p-)STT-MRAM can be reduced by over 90 % with little degradation of processor performance. The presented architecture with nonvolatile memory hierarchy will realize the “normally-off computers”.
Keywords :
MRAM devices; cache storage; HP-processor; nonvolatile memory hierarchies; normally-off computers; normally-off mobile processors; perpendicular-(p-)STT-MRAM; processor architecture; spin torque transfer magnetic random access memory; volatile hybrid cache memory; Cache memory; Clocks; Computer architecture; Nonvolatile memory; Power supplies; Program processors; Random access memory;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific
Conference_Location :
Singapore
DOI :
10.1109/ASPDAC.2014.6742851
