• DocumentCode
    2452210
  • Title

    A more efficient triangle rasterization algorithm implemented in FPGA

  • Author

    Wang, Xuzhi ; Guo, Feng ; Zhu, Mengyao

  • Author_Institution
    Sch. of Commun. & Inf. Eng., Shanghai Univ., Shanghai, China
  • fYear
    2012
  • fDate
    16-18 July 2012
  • Firstpage
    1108
  • Lastpage
    1113
  • Abstract
    3D graphics hardware acceleration has become more and more important in mobile devices. In the paper, we review some triangle rasterization algorithm previously. On that basis, we propose a novel triangle rasterization algorithm - midpoint traversal, which reduce the number of traversal points and improve the efficiency of graphic acceleration. At last, we use FPGA to implement the algorithm, drawing a conclusion: in the equality resource, compared with others triangle rasterization algorithm based edge function, the midpoint traversal can improve the efficiency.
  • Keywords
    computer graphics; field programmable gate arrays; geometry; 3D graphics hardware acceleration; FPGA; edge function; efficient triangle rasterization algorithm; graphic acceleration; midpoint traversal; mobile devices; triangle rasterization algorithm; Algorithm design and analysis; Approximation algorithms; Educational institutions; Field programmable gate arrays; Graphics; Hardware; Pipelines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Audio, Language and Image Processing (ICALIP), 2012 International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4673-0173-2
  • Type

    conf

  • DOI
    10.1109/ICALIP.2012.6376782
  • Filename
    6376782