Title :
Precise control of instruction caches
Author :
Smirli, Maria ; Lioupis, Dimitris ; Kissell, Kevin
Author_Institution :
Dept. of Comput. Eng. & Inf., Patras Univ., Greece
Abstract :
Instruction caches are usually designed to fetch the whole block from memory in case of a miss. However, the fetched blocks might contain branch instructions which if taken, will render the rest of the block useless. A novel approach is introduced, namely the Precise Control, which fetches only the words of a cache block that are likely to be used. The performance of Precise Control is evaluated and it is shown that it has a positive influence on system performance. Precise Control reduces the words fetched from memory by up to 60%, thus reducing significantly the communication overhead between cache and main memory as well as the total execution time
Keywords :
cache storage; instruction sets; memory architecture; branch instructions; cache block; communication overhead; execution time; fetched blocks; instruction caches; main memory; precise control; system performance; Capacitive sensors; Communication system traffic control; Computer aided instruction; Computer graphics; Delay; Hardware; Informatics; Prefetching; Silicon; System performance;
Conference_Titel :
High Performance Computing, 1998. HIPC '98. 5th International Conference On
Conference_Location :
Madras
Print_ISBN :
0-8186-9194-8
DOI :
10.1109/HIPC.1998.737965