Title :
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486)
Abstract :
The following topics are dealt with: interconnect-centric SoC design; energy optimization using dynamic voltage scaling for embedded systems; high-level synthesis; placement and floorplanning; SoC testing; dynamic verification; delay and signal modeling for timing analysis; software techniques for energy and performance optimization; optimization of global interconnects; numerical methods for analog optimization and analysis; CAD algorithms; design techniques for customized processors; verification engines; analog design and methodology; automatic abstraction for formal verification; nonlinear modelling of analog and optical systems; routing; nanometer scale simulation; constraint driven high-level synthesis; optimal interconnect synthesis and analysis; memory testing; statistical static timing; power-aware design; logic synthesis; graph algorithmic approaches to EDA problems; power grid and substrate analysis; interconnect modeling; test data reduction techniques.
Keywords :
analogue circuits; analogue integrated circuits; circuit CAD; circuit layout CAD; circuit optimisation; electronic design automation; embedded systems; formal verification; high level synthesis; integrated circuit interconnections; integrated circuit layout; logic CAD; nanoelectronics; network routing; system-on-chip; CAD algorithms; EDA; SoC design; analog optimization; computer aided design; customized processors; dynamic verification; dynamic voltage scaling; embedded systems; energy optimization; floorplanning; formal verification; global interconnects; graph algorithmic approaches; high-level synthesis; interconnect modeling; logic synthesis; memory testing; nanometer scale simulation; nonlinear modelling; numerical methods; power grid; routing; signal modeling; software techniques; statistical static timing; substrate analysis; system-on-chip; test data reduction techniques; timing analysis; verification engines; Analog circuits; Analog integrated circuits; Circuit optimization; Design automation; High-level synthesis; Integrated circuit interconnections; Integrated circuit layout; Routing;
Conference_Titel :
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-762-1
DOI :
10.1109/ICCAD.2003.159660