DocumentCode
2453347
Title
Optimal versus Heuristic Global Code Scheduling
Author
Winkel, Sebastian
Author_Institution
Intel Corp., Santa Clara
fYear
2007
fDate
1-5 Dec. 2007
Firstpage
43
Lastpage
55
Abstract
We present a global instruction scheduler based on integer linear programming (ILP) that was implemented experimentally in the Intel Itaniumreg product compiler. It features virtually the full scale of known EPIC scheduling optimizations, more than its heuristic counterpart in the compiler, GCS, and in contrast to the latter it computes optimal solutions in the form of schedules with minimal length. Due to our highly efficient ILP model it can solve problem instances with 500-750 instructions, and in combination with region scheduling we are able to schedule routines of arbitrary size. In experiments on five SPECreg CPU2006 integer benchmarks, ILP-scheduled code exhibits a 32% schedule length advantage and a 10% runtime speedup over GCS-scheduled code, at the highest compiler optimization levels typically used for SPEC submissions. We further study the impact of different code motion classes, region sizes, and target microarchitectures, gaining insights into the nature of the global instruction scheduling problem.
Keywords
instruction sets; integer programming; linear programming; optimising compilers; scheduling; EPIC scheduling optimizations; ILP model; compiler optimization levels; heuristic global code scheduling; instruction scheduler; integer linear programming; optimal global code scheduling; Computer architecture; Integer linear programming; Microarchitecture; Motion control; Optimal scheduling; Optimizing compilers; Parallel processing; Processor scheduling; Program processors; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture, 2007. MICRO 2007. 40th Annual IEEE/ACM International Symposium on
Conference_Location
Chicago, IL
ISSN
1072-4451
Print_ISBN
978-0-7695-3047-5
Electronic_ISBN
1072-4451
Type
conf
DOI
10.1109/MICRO.2007.10
Filename
4408244
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