DocumentCode
2453687
Title
Verification Of Error Models Through Low-level Simulation
Author
Tsai, T.K. ; Choi, G.S. ; Iyer, R.K.
Author_Institution
Univ. of Illinois, Urbana, IL 61801
fYear
1994
fDate
25-26 Apr 1994
Firstpage
15
Lastpage
16
Keywords
Aerospace electronics; Aircraft; Circuit faults; Circuit simulation; Computational modeling; Dictionaries; Error correction; Error probability; Microprocessors; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrating Error Models with Fault Injection, 1994., Third Int'l Workshop on
Type
conf
DOI
10.1109/WIEM.1994.654394
Filename
654394
Link To Document