Title :
A low-latency asynchronous interconnection network with early arbitration resolution
Author :
Faldamis, Georgios ; Weiwei Jiang ; Gill, Gennette ; Nowick, Steven M.
Author_Institution :
Cavium Inc., San Jose, CA, USA
Abstract :
A new asynchronous arbitration node is introduced for use as a building block in an asynchronous interconnection network. The target network topology is a variant Mesh-of-Trees (MoT), combining a binary fan-out (i.e. routing) network and a binary fan-in (i.e. arbitration) network, which is becoming widely used for multi-core shared-memory interfaces. The two key features are: (i) each fan-in node can resolve its arbitration and pre-allocate the corresponding input channel, before the actual data arrives; and (ii) a lightweight shadow monitoring network fast forwards information as soon as data enters the network without synchronization to a fixed-rate clock, notifying each fan-in node on its path to enable the early arbitration. Simulations of the new arbitration node, using IBM 90nm technology and an ARM standard cell library, indicate latency reductions up to 54.4% over prior designs, while maintaining roughly comparable throughput. Network-level simulations were then performed on eight diverse synthetic benchmarks, comparing the new approach ("early arbitration") with two earlier alternative asynchronous MoT networks ("baseline" and "predictive"), using a mix of random and deterministic traffic. Considerable improvements in system latency were obtained on all benchmarks, ranging from 13.0% to 38.7%, with especially strong benefits for the two most adversarial benchmarks.
Keywords :
asynchronous circuits; logic design; shared memory systems; synchronisation; ARM standard cell library; IBM; MoT; arbitration resolution; asynchronous arbitration node; asynchronous interconnection network; binary fan-in network; binary fan-out network; mesh-of-trees; multicore shared-memory interfaces; shadow monitoring network; size 90 nm; target network topology; Latches; Monitoring; Network topology; Protocols; Routing; Throughput; Topology;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific
Conference_Location :
Singapore
DOI :
10.1109/ASPDAC.2014.6742911