• DocumentCode
    2454068
  • Title

    FPGA Implementation of Dynamic Threshold Sphere Detection for MIMO Systems

  • Author

    Amiri, Kiarash ; Cavallaro, Joseph R.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Rice Univ., Houston, TX
  • fYear
    2006
  • fDate
    Oct. 29 2006-Nov. 1 2006
  • Firstpage
    94
  • Lastpage
    98
  • Abstract
    In this paper, we consider the FPGA implementation of a modified sphere detection algorithm. We analyze breadth-first and depth-first search in sphere detection, and compare the relative performance and complexity. Based on these comparisons, we propose a more efficient and less complex scheme, dynamic threshold sphere detection (DTSD), which can effectively increase the throughput and reduce the error rate. We, then, propose a novel architecture for this scheme, and discuss the complexity reduction techniques that we utilized. These techniques do not compromise the overall performance. Finally, the high throughput FPGA implementation results of this algorithm will be presented.
  • Keywords
    MIMO communication; field programmable gate arrays; logic design; FPGA; MIMO systems; breadth-first search; depth-first search; dynamic threshold sphere detection; modified sphere detection algorithm; Detectors; Field programmable gate arrays; MIMO; Maximum likelihood detection; Maximum likelihood estimation; Multimedia communication; Multimedia systems; Receiving antennas; Throughput; Transmitting antennas;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA
  • ISSN
    1058-6393
  • Print_ISBN
    1-4244-0784-2
  • Electronic_ISBN
    1058-6393
  • Type

    conf

  • DOI
    10.1109/ACSSC.2006.356591
  • Filename
    4176520