DocumentCode :
2454352
Title :
Gigabit rate low-power LDPC decoder
Author :
Pisek, Eran ; Rajan, Dinesh ; Cleveland, Joseph
fYear :
2011
fDate :
16-20 Oct. 2011
Firstpage :
518
Lastpage :
522
Abstract :
LDPC codes are becoming popular in next generation high throughput wireless standards since they can provide a level of parallelism with sufficient performance to support the high gigabit rate. In this paper, we propose a new method for LDPC decoding called Parallel Processing Layered (PPL). The new method aims to optimize the latency and power efficiency of LDPC decoding to enable significant increase of the processing rate, thereby saving battery power for mobile devices. We provide performance results in different channel models using the newly defined WiGig standards, and compare them to the conventional decoding methods. We show that the new proposed LDPC decoding architecture converges 2x faster than conventional (i.e. Flooding) methods.
Keywords :
decoding; parity check codes; Gigabit communication; LDPC codes; WiGig standards; battery power saving; low-power LDPC decoder; mobile devices; parallel processing layered; Complexity theory; Floods; Iterative decoding; Maximum likelihood decoding; Program processors; Flooding; Gigabit Communications; LDPC Decoder; Layered; Low Power Architecture; WiGig;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory Workshop (ITW), 2011 IEEE
Conference_Location :
Paraty
Print_ISBN :
978-1-4577-0438-3
Type :
conf
DOI :
10.1109/ITW.2011.6089516
Filename :
6089516
Link To Document :
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