DocumentCode
2454387
Title
FPGA implementation of an image recognition system based on Tiny Neural networks and on-line reconfiguration
Author
Moreno, Félix ; Alarcón, Jaime ; Salvador, Rubén ; Riesgo, Teresa
Author_Institution
Dept. de Autom., Univ. Politec. de Madrid, Madrid
fYear
2008
fDate
10-13 Nov. 2008
Firstpage
2445
Lastpage
2452
Abstract
Neural networks are widely used in pattern recognition, security applications and robot control. We propose a hardware architecture system; using Tiny Neural Networks (TNN) specialized in image recognition. The generic TNN architecture allows expandability by means of mapping several Basic units (layers) and dynamic reconfiguration; depending on the application specific demands. One of the most important features of Tiny Neural Networks (TNN) is their learning ability. Weight modification and architecture reconfiguration can be carried out at run time. Our system performs shape identification by the interpretation of their singularities. This is achieved by interconnecting several specialized TNN. The results of several tests, in different conditions are reported in the paper. The system detects accurately a test shape in almost all the experiments performed. The paper also contains a detailed description of the system architecture and the processing steps. In order to validate the research, the system has been implemented and was configured as a perceptron network with backpropagation learning and applied to the recognition of shapes. Simulation results show that this architecture has significant performance benefits.
Keywords
backpropagation; field programmable gate arrays; image recognition; neural net architecture; perceptrons; FPGA implementation; TNN architecture; architecture reconfiguration; backpropagation learning; dynamic reconfiguration; hardware architecture system; image recognition system; online reconfiguration; pattern recognition; perceptron network; robot control; security application; shape identification; tiny neural networks; Backpropagation; Field programmable gate arrays; Image recognition; Neural network hardware; Neural networks; Pattern recognition; Performance evaluation; Robot control; Shape; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics, 2008. IECON 2008. 34th Annual Conference of IEEE
Conference_Location
Orlando, FL
ISSN
1553-572X
Print_ISBN
978-1-4244-1767-4
Electronic_ISBN
1553-572X
Type
conf
DOI
10.1109/IECON.2008.4758340
Filename
4758340
Link To Document