DocumentCode :
2454971
Title :
Consideration of fast simulation technique of LDPC code
Author :
Shohon, Toshiyuki ; Hori, Yasunori ; Ogiwara, Haruo
Author_Institution :
Nagaoka Univ. of Technol., Nagaoka
fYear :
2007
fDate :
23-27 Sept. 2007
Firstpage :
118
Lastpage :
122
Abstract :
This paper proposes a method to estimate bit-error rate (BER) at high signal-to-noise ratio. The computer simulation result of the proposed method shows good agreement with those of the original Monte Carlo (MC) simulations. By using the proposed method, the number of bits needed to computer simulation is reduced to 50% of the MC simulation for code length 1027[bit], It is reduced to 20% compared with the MC simulation for code length 4000[bit], The time to estimate BER for the proposed method is reduced to 60% of original envelop method.
Keywords :
Monte Carlo methods; error statistics; estimation theory; parity check codes; LDPC code; Monte Carlo simulation; bit-error rate estimation; fast computer simulation technique; signal-to-noise ratio; AWGN channels; Additive white noise; Bit error rate; Computational modeling; Computer simulation; Euclidean distance; Gaussian noise; Monte Carlo methods; Parity check codes; Signal to noise ratio; AWGN channel; Bit Error Ratio; Euclidean distance; Importance Sampling; LDPC codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Design and Its Applications in Communications, 2007. IWSDA 2007. 3rd International Workshop on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-1074-3
Electronic_ISBN :
978-1-4244-1074-3
Type :
conf
DOI :
10.1109/IWSDA.2007.4408338
Filename :
4408338
Link To Document :
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