A new technique to extract the gate bias dependent s/d series resistance of sub-100nm MOSFETs

In this study, a new technique to extract the S/D series resistance (R_sd) from the total resistance versus transconductance gain plot R_tot(1/beta) is proposed. The technique only requires the measurement of I_d(V_gs)|_Vgt and beta, allowing fast and statistical analysis in an industrial context. Unlike the usual R_tot(L)-based techniques, it has the advantage of being insensitive to the channel length and mobility variations and finally enables to extract very accurate values for R_sd(V_gs) and the effective mobility reduction factor mu_eff(V_gt)/mu_eff(0).