• DocumentCode
    2455747
  • Title

    Influence of gate misalignment on the electrical characteristics of MuGFETs

  • Author

    Lee, Chi-Woo ; Afzalian, Aryan ; Yan, Ran ; Dehdashti, Nima ; Xiong, Weize ; Colinge, Jean-Pierre

  • Author_Institution
    Tyndall Nat. Inst., Cork, Ireland
  • fYear
    2009
  • fDate
    27-29 April 2009
  • Firstpage
    125
  • Lastpage
    126
  • Abstract
    This work studies the influence of gate misalignment on the electrical properties of MuGFETs using both measurements and 3D simulations. Electrical characteristics such as a DIBL, Vth and drain breakdown voltage are shown to be dependent on the gate misalignment due to the resulting change in fin width. Devices that have a Widening of the fin at the Drain side (DW) decreased due to weakening of gate control. Widening of the fin at the Source (SW), however, does not alter the device characteristics.
  • Keywords
    MOSFET; electric breakdown; silicon-on-insulator; MuGFET; drain breakdown voltage; drain side; electrical characteristics; gate misalignment; multigate SOI MOSFET; source; DVD; Electric breakdown; Electric variables; Electric variables measurement; Electrodes; Fabrication; Impact ionization; Lithography; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-2784-0
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2009.5159322
  • Filename
    5159322
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2455747