Title :
Fast linear congruence generator
Author_Institution :
Comput. & Inf. Eng. Dept., Huainan Normal Univ., Huainan, China
Abstract :
New fast algorithm has be brought forward for the linear congruence generator such as y(n+1)=(16807 × y(n))mod(2^31-1) and be realized. The fast algorithm for linear congruence generator calls one time 32-bit multiplier; two-times 32-bit adders, a few bit shifters and a highest bit segregator, with excluding subtraction and division. The experiment shows that the fast algorithm is 40 percent more fast than other linear congruence algorithm. The fast algorithm is realized in the hard describing language with three 32-bit registers.
Keywords :
adders; algorithm theory; digital arithmetic; random number generation; shift registers; 32-bit adder; 32-bit multiplier; 32-bit register; bit segregator; bit shifter; fast algorithm; hard describing language; linear congruence generator; Adders; Clocks; Computers; Generators; Integrated circuit modeling; Random sequences; Software algorithms; Fast algorithm; linear congruence; realization; sequence generator;
Conference_Titel :
Computer Science and Education (ICCSE), 2010 5th International Conference on
Conference_Location :
Hefei
Print_ISBN :
978-1-4244-6002-1
DOI :
10.1109/ICCSE.2010.5593821
