Overall operation considerations for a SONOS-based memory

Author

Lee, C.H. ; Tu, W.H. ; Chong, L.H. ; Gu, S.H. ; Chen, K.F. ; Chen, Y.J. ; Hsieh, J.Y. ; Huang, I.J. ; Zous, N.K. ; Han, T.T. ; Chen, M.S. ; Lu, W.P. ; Chen, K.C. ; Wang, Tahui ; Lu, C.Y.

Author_Institution

Macronix Int. Co., Ltd., Hsin-Chu, Taiwan

fYear

2009

fDate

27-29 April 2009

Firstpage

150

Lastpage

151

Abstract

Erase characteristics of a SONOS-based structure are emulated not only for n⁺-poly and p⁺-poly gates but also for TaN-gate+Al₂O₃ combination. By incorporating our previous studies, performances including program, erase, and read disturb can be reviewed for both SONOS and TANOS devices. Unsurprisingly, it is hard to satisfy all requirements by using a SONOS device. In a TANOS device, an optimal bottom oxide thickness can be specified with the consideration of the three factors simultaneously. Moreover, it is found that conventional extrapolation methodology is inadequate to predict the lifetime of a TANOS device and tends to under-estimate the tolerable read bias.

Keywords

extrapolation; semiconductor storage; semiconductor-insulator-semiconductor devices; SONOS-based Memory; TANOS devices; bottom oxide thickness; extrapolation methodology; n+-poly gates; p+-poly gates; tolerable read bias; Aluminum oxide; Charge carrier processes; Electronics industry; Electrons; Extrapolation; Industrial electronics; Inorganic materials; SONOS devices; Semiconductor materials; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

978-1-4244-2784-0

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2009.5159334

Filename

5159334