Title :
Band engineered tunnel oxides for improved TANOS-type flash program/erase with good retention and 100K cycle endurance
Author :
Gilmer, David C. ; Goel, Niti ; Verma, Sarves ; Park, Hokyung ; Park, Chanro ; Bersuker, Gennadi ; Kirsch, Paul D. ; Saraswat, Krishna C. ; Jammy, Raj
Author_Institution :
SEMATECH, Austin, TX, USA
Abstract :
We demonstrate for the first time improved program, erase, and endurance for charge trap flash TaN-Al2O3-Si3N4-ldquoTunnel-oxide (TO)rdquo-Si MOSFETs through band engineered tunnel oxides (BETO). Several high-K dielectrics (HfO2, HfSiO, Al2O3, Si3N4) and tunnel stack sequences (SiO2-high-k, SiO2-high-k-SiO2) are compared. New results are as follows: SiO2/Al2O3 (OA) BE-TO and SiO2/Si3N4/SiO2 (ONO) BE-TO DeltaVth windows improve >300% vs. standard SiO2-TO. Both OA and ONO stacks endure P/E cycles to at least 100 K cycles maintaining a window >4V. Results are consistent with a model based on high-k conduction/valence band offsets. Increased erase efficiency for BE-TO enables improved endurance without sacrificing P/E window due to lower P/E voltage stressing. These large, enduring windows are favorable for multi-level cell application and may extend TANOS flash beyond the 20 nm node.
Keywords :
MOSFET; aluminium compounds; flash memories; silicon compounds; tantalum compounds; MOSFET; TaN-Al2O3-Si3N4; band engineered tunnel oxides; flash devices; Aluminum oxide; Electron traps; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Jamming; MOSFETs; Modulation coding; Silicon compounds; Voltage;
Conference_Titel :
VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2784-0
Electronic_ISBN :
1524-766X
DOI :
10.1109/VTSA.2009.5159337